[10] <§2.5> The following MIPS instruction sequence could be used to implement a new instruction that has two register operands. Give the instruction a name and describe what it does. Note that register $t0 is being used as a temporary.
srl $s1, $s1, 1 # sll $t0, $s0, 31 # These 4 instructions accomplish srl $s0, $s0, 1 # “new $s0 $s1” or $s1, $s1, $t0 #
$s0,$s1とも右に1bit論理シフトし、$s0の最下位ビットを$s1の最上位に持ってきています。この4命令で、$s0, $s1をつなげて64bitのレジスタと見たときの1bitの論理右シフトを実行しています。
